{"id":7057,"date":"2026-09-04T18:49:24","date_gmt":"2026-09-04T10:49:24","guid":{"rendered":"https:\/\/www.54iter.cn\/?vuln=cve-2026-72409"},"modified":"2026-09-04T18:49:24","modified_gmt":"2026-09-04T10:49:24","slug":"cve-2026-72409","status":"publish","type":"vuln","link":"https:\/\/www.54iter.cn\/?vuln=cve-2026-72409","title":{"rendered":"CVE-2026-72409 [HIGH] &#8211; In the Linux kernel, the following vulnerability has been resolved:\n\nnet: mvneta: re-enabl"},"content":{"rendered":"<p>In the Linux kernel, the following vulnerability has been resolved:<\/p>\n<p>net: mvneta: re-enable percpu interrupt on resume<\/p>\n<p>On Marvell MPIC platforms (Armada 370\/XP\/38x), mvneta uses a percpu<br \/>\nIRQ disable\/enable scheme for NAPI: the ISR (mvneta_percpu_isr) calls<br \/>\ndisable_percpu_irq() to mask the MPIC per-CPU interrupt and schedules<br \/>\nNAPI poll, which calls enable_percpu_irq() on completion to unmask.<\/p>\n<p>If suspend occurs while NAPI poll is pending (between<br \/>\ndisable_percpu_irq in the ISR and enable_percpu_irq in poll<br \/>\ncompletion), the interrupt is never re-enabled:<\/p>\n<p>  1. mvneta_percpu_isr: disable_percpu_irq() + napi_schedule()<br \/>\n     =&gt; MPIC masked, percpu_enabled cpumask bit cleared<br \/>\n  2. NAPI poll does not complete before suspend proceeds<br \/>\n     (on PREEMPT_RT this is highly likely since softirqs run in<br \/>\n     ksoftirqd which gets frozen; on non-RT it can happen when<br \/>\n     softirq processing is deferred to ksoftirqd)<br \/>\n  3. mvneta_stop_dev =&gt; napi_disable(): cancels the pending poll<br \/>\n     without executing the completion path<br \/>\n  4. suspend_device_irqs =&gt; IRQCHIP_MASK_ON_SUSPEND: masks MPIC<br \/>\n     (already masked, but records IRQS_SUSPENDED)<br \/>\n  5. Resume: mpic_resume checks irq_percpu_is_enabled() =&gt; false<br \/>\n     (bit was cleared in step 1) =&gt; skips unmask<br \/>\n  6. mvneta_start_dev only restores device-level INTR_NEW_MASK,<br \/>\n     does not touch the MPIC per-CPU mask<\/p>\n<p>Result: MPIC per-CPU interrupt stays masked permanently. The NIC<br \/>\ngenerates interrupts (INTR_NEW_CAUSE != 0) but the CPU never<br \/>\nreceives them, causing complete loss of network connectivity.<\/p>\n<p>Fix by calling on_each_cpu(mvneta_percpu_enable) in the resume path<br \/>\nto unconditionally unmask the MPIC per-CPU interrupt regardless of<br \/>\npre-suspend state.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>In the Linux kernel, the following vulnerability has been resolved:<\/p>\n<p>net: mvneta: re-enable percpu interrupt on resume<\/p>\n<p>On Marvell MPIC platforms (Armada 370\/XP\/38x), mvneta uses a percpu<br \/>\nIRQ disable\/<\/p>\n","protected":false},"template":"","meta":[],"categories":[],"tags":[],"class_list":["post-7057","vuln","type-vuln","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.54iter.cn\/index.php?rest_route=\/wp\/v2\/vuln\/7057","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.54iter.cn\/index.php?rest_route=\/wp\/v2\/vuln"}],"about":[{"href":"https:\/\/www.54iter.cn\/index.php?rest_route=\/wp\/v2\/types\/vuln"}],"wp:attachment":[{"href":"https:\/\/www.54iter.cn\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=7057"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.54iter.cn\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=7057"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.54iter.cn\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=7057"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}